Senior Hardware Engineering Manager Microsoft
Redmond, WA

Job Description

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft is seeking a highly motivated, FPGA and ASIC IP design engineering manager to build innovative FPGA-based computing systems within a large design team. Well-designed hardware can provide fine-grained parallelism and significantly accelerate many types of computations. Microsoft provides a great channel for product impact that touches the lives of millions of users daily, in an environment at the cutting edge of high-performance computing.

Seeking a personable, energetic candidate to manage, grow and mentor a group of eight or more engineers. The group will include a broad range of experience levels and engineering skills and will focus on developing and validating an FPGA Shell (hardware abstraction layer) on FPGAs for Microsoft's next generation of cloud servers and applications. A strong candidate will be creative, think critically, able to analyze & resolve complex issues and have strong communications skills. Technical experience in systems, architecture, hardware IP, and SW API design are a plus.

Qualifications:

* A solid computer engineering background (MS in electrical and/or computer engineering or equivalent degree preferred, BS required.).
* At least twelve years of experience with hardware/systems design and development/verification of FPGA and/or ASIC solutions.
* At least five years of management experience
* Hardware design expertise using Verilog, System Verilog.
* Experience working in a team environment.
* Experience in compilation flows and/or FPGA CAD tool development a plus.

Desired skills and experience:

* FPGA design & implementation tools expertise
* Programming and scripting in C, C++, C#, OpenCL, System C, Powershell and/or Perl
* Knowledge of Windows device driver hardware interfaces

Position requires limited domestic and international travel.

Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge cloud technology that changes our world. The Cloud Server Infrastructure (CSI) team in Microsoft's Azure C+E division is responsible for delivering server infrastructure for Microsoft's online services. The hardware for operating these services (over 200 and counting), comprises of hundreds of thousands of servers spread globally and applications that reach hundreds of millions of users every day. Our customer-base is growing rapidly, our infrastructure investments are multiplying, and the size of our global infrastructure is increasing by the day - along with the scale of our challenges. Learn more about our team and projects here Azure Hardware Infrastructure

CSIL

Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include, but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, color, family or medical care leave, gender identity or expression, genetic information, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran status, race, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable laws, regulations and ordinances. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. If you need assistance and/or a reasonable accommodation due to a disability during the application or the recruiting process, please send a request via the Accommodation request form.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.

Primary responsibilities include:

* Manage, grow, and mentor a FPGA RTL and verification team
* Work with application groups to define, architect, develop, verify, and release RTL blocks
* Integrate and debug 3rd party IP blocks
* Work in a team of hardware and software engineers to deploy working systems to a very large user base.